Right now in August 2021, there's two types of M5Go bottom, M5Go, and M5Go2.
The M5Go2 remaps Port C's pins that are used on the Core2 for the PSRAM. This means that there's no unsoldering needed on the Core2 to use Port C, and the PSRAM now stays enabled! Yay!
(If you DID try using your M5Go (not M5Go2) on a Core2... you'd break PSRAM support. Core2 NEEDS a M5Go2.)
Here are the pin positions for Port A, Port B, and the Grove port, for the Core and Core 2:
Core (M5Go):
Port A (Red) : Pins SCL 22, SDA 21 : I2C, Supports digital and I2C mode,
Port B (Black) : Pins DAC 26, ADC 36 : DAC/ADC, Is generic IO
Port C (Blue) : Pins TX 16, RX 17 : Supports UART mode however outside of UIFlow the IO pins of the esp32 support various different modes.
Core 2 (M5Go2 bottom):
Port A (Red) : Pins SCL 32, SDA 33 : I2C, Supports digital and I2C mode,
Port B (Black) : Pins DAC 26, ADC 36 : DAC/ADC, Is generic IO
Port C (Blue) : Pins TXD2 14, RXD2 13 : Supports UART.